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ISD2532/40/48/64 single-chip, multiple-messages, voice record/playback device 32-, 40-, 48-, and 64-second duration publ i c at i on rel e ase dat e : june 2003 - 1 - revi si on 1.0
ISD2532/40/48/64 1. general description winbond?s isd2500 chipcorder ? series provide high-quality, singl e-chip, record/ p lay back solut i ons for 32- to 64-second messaging applications. the cmos devices include an on-chip oscillator, microphone preamplifier, automatic gain control, antialiasing filter, smoot hing filter, speaker amplifier, and high density multi-level storage array. in additi on, the isd2500 is microcontroller compatible, allowing complex messaging and addressing to be achieved. recordings are stored into on-chip nonvolatile memory cells, providing zero-power me ssage storage. this unique, single-chip solution is made possible through winbond?s patented multileve l storage technology. voice and audio signals are stored directly into memory in their natural form, providing high-quality, solid-state voice reproduction. 2. features ? single 5 volt power supply ? single-chip with duration of 32, 40, 48, or 64 seconds. ? easy-to-use single-chip, voice record/playback solution ? high-quality, natural voice/audio reproduction ? manual switch or microcontroller compatible ? playback can be edge- or level-activated ? directly cascadable for longer durations ? automatic power-down (push-button mode) - standby current 1 a (typical) ? zero-power message storage - eliminates battery backup circuits ? fully addressable to handle multiple messages ? 100-year message retention (typical) ? 100,000 record cycles (typical) ? on-chip clock source ? programmer support for play-only applications ? available in die form, pdip, soic and tsop packaging ? temperature options: die (0 c to + 5 0 c) and package (0 c to + 7 0 c) - 2 -
ISD2532/40/48/64 3. block diagram int e r n a l c l oc k ti m i n g s a mpl i ng c l ock 25 6k cel l n onvola t ile m u lt ile v e l st or a g e a rray a n al og t r ansc ei ve rs d e c oders d evi c e c ontrol pow e r c onditioning a u tom a ti c g a in c ont r o l (a g c ) 5-pol e a c ti ve a n t i a lia s i ng filt e r 5- p o l e a c t i v e s m oothing filte r am p pre - am p sp + sp - eo m ce p/ r ovf pd v cc a v ssa v ssd v cc d ag c m i c re f mi c xc lk am p an a i n an a o u t mu x au x i n a ddres s b u ffers a0 a1 a2 a3 a4 a5 a6 a7 a8 publ i c at i on rel e ase dat e : june 2003 - 3 - revi si on 1.0
ISD2532/40/48/64 4. table of contents 1. general d escription ......................................................................................................... ......... 2 2. features .................................................................................................................... ..................... 2 3. block diagram ............................................................................................................... ............... 3 4. table of cont ents ........................................................................................................... ........... 4 5. pin conf igurati on ........................................................................................................... ............ 5 6. pin des cription ............................................................................................................. ................ 6 7. functional descript ion ...................................................................................................... .... 10 7.1. detailed des c r ip tion ...................................................................................................... .............. 10 7.2. operat ional modes ......................................................................................................... ............ 11 7.2.1. operational modes descr iption ........................................................................................... .1 2 8. timing diagrams ............................................................................................................. ............. 16 9. absolute maxi mum ratings .................................................................................................... 19 9.1 operati ng condi tions ....................................................................................................... ............ 20 10. electrical cha racteris tics ............................................................................................... 21 10.1. parameters for packaged parts ............................................................................................ .. 21 10.1.1. typical parameter variation with voltage and temperatur e - packaged parts ................ 24 10.2. paramete rs for die ....................................................................................................... ........... 25 10.2.1. typical parameter variation with voltage and tem perature - die .................................... 28 10.3. parameters fo r pus h -bu tton mode .......................................................................................... 29 11. typical applic ation ci rcuit ................................................................................................ .3 0 12. package drawing and dimens ions .................................................................................... 35 12.1. 28-lead 300-mil plastic sm all outline ic (soi c) ..................................................................... 35 12.2. 28-lead 600-mil plastic d ual inline pack age (pdi p) ............................................................... 36 12.3. 28-lead 8x13.4mm plastic thin sma ll outline package (t sop) type 1 ................................ 37 12.4. die bonding physical layout [1] ................................................................................................ 38 14. version history ............................................................................................................ ........... 41 - 4 -
ISD2532/40/48/64 5. pin configuration so i c / p di p a0 / m 0 a1 / m 1 a2 / m 2 a3 / m 3 a4 / m 4 a5 / m 5 a6 / m 6 nc a7 a8 au x i n v ssd v ssa sp + p/ r xc lk eo m pd ce ov f an a o u t an a i n ag c mi c r e f mi c v cc a sp- v cc d 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 is d 2 5 3 2 is d 2 5 4 0 is d 2 5 4 8 is d 2 5 6 4 an a o u t an a i n ag c mi c r e f mi c v cc a sp- sp+ v ssa v ssd au x i n a8 a7 nc ov f ce pd eo m xc lk p/ r v ccd a0 / m 0 a1 / m 1 a2 / m 2 a3 / m 3 a4 m 4 a5 / m 5 a6 / m 6 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 tso p i s d 2532 i s d 2340 i s d 2548 i s d 2564 publ i c at i on rel e ase dat e : june 2003 - 5 - revi si on 1.0
ISD2532/40/48/64 6. pin description pin no. function pin name soic / pdip tsop a0, a1, a2, a3, a4, a5, a6, a7, a8 / m0, m1, m2, m3, m4, m5, m6 1, 2, 3, 4, 5, 6, 7, 9, 10 / 1, 2, 3, 4, 5, 6, 7 8, 9, 10, 11, 12, 13, 14, 16, 17 / 8, 9, 10, 11, 12, 13, 14 address/mode inputs : the address/mode inputs have two functions depending on the level of the two most significant bits (msb) of the address pins a7 and a8. if either or both of the two msbs ar e low, the inputs are all interpreted as address bits and are used as the start address for the current record or playback cycle. the address pi ns are inputs only and do not output any internal address information dur ing the operation. address inputs are latched by the falling edge of ce . if both msbs are high, the addre ss/mode inputs are interpreted as mode bits according to the operational mode table on page 12. there are six operational modes (m0?m6) ava ilable as indicated in the table. it is possible to use multiple operational modes simultaneously. operational modes are sampled on each falling edge of ce , and thus operational modes and direct addre ssing are mutually exclusive. n c 8 1 5 no connect. aux in 11 18 auxiliary input: the auxiliary input is mult iplexed through to the output amplifier and speaker output pins when ce is high, p/ r is high, and playback is currently not active or if the device is in playback overflow. when cascading multiple is d2500 devices, the aux in pin is used to connect a playback signal from a following device to the previous output speaker drivers. for noise considerations, it is suggested that the auxiliary input not be driven when the storage array is ac tive. v ssa , v ssd 13, 12 20, 19 ground : the isd2500 series of devices utilizes separate analog and digital ground busses. these pins should be connected separately through a low-impedance path to power supply ground. sp+, sp- 14, 15 21, 22 speaker outputs : all devices in the isd2500 series include an on-chip differential speaker driver, c apable of driving 50 mw into 16 ? from aux in (12.2mw from memory). [1] the speaker outputs are held at v ssa levels during record and power down. it is therefore not possible to parallel speaker outputs of multiple isd2500 devices or the outputs of other speaker drivers. [2] a single-end output may be used (including a coupling capacitor between the sp pin and the speaker). these outputs may be used individually with the output signal tak en from either pin. however, the use of single-end output results in a 1 to 4 reduction in its output power. [1 ] connection of speaker outputs in para llel may cause damage to the device. [2 ] never ground or drive an unused speaker output. - 6 -
ISD2532/40/48/64 pin no. pin name soic/ pdip tsop function v cca , v ccd 16, 28 23, 7 supply voltage : to minimize noise, the analog and digital circuits in the isd2500 series devices use separate power busses. these voltage busses are brought out to separate pins and should be tied together as close to the supply as possible. in addition, these supplies should be decoupled as close to the package as possible. m i c 1 7 2 4 microphone : the microphone pin transfers input signal to the on- chip preamplifier. a built-in automatic gain control (agc) circuit controls the gain of this preamplifier from ?15 to 24db. an external microphone should be ac coupled to this pin via a series capacitor. the capacitor value, together with the internal 10 k ? resistance on this pin, determines the low-fr equency cutoff for the isd2500 series passband. see winbond?s applicati on information for additional information on low-frequency cutoff calculation. mic ref 18 25 microphone reference : the mic ref input is the inverting input to the microphone preamplifier. this provides a noise-canceling or common-mode rejection input to the device when connected to a differential microphone. a g c 1 9 2 6 autom a tic gain control : the agc dynamically adjusts the gain of the preamplifier to compensate for the wide range of microphone input levels. the agc allows the full range of whispers to loud sounds to be recorded with minimal distortion. the ?attack? time is determined by the time constant of a 5 k ? internal resistance and an external capacitor (c2 on the sc hematic of figure 5 in section 11) connected from the agc pin to v ssa analog ground. the ?release? time is determined by t he time constant of an external resistor (r2) and an external capac itor (c2) connected in parallel between the agc pin and v ssa analog ground. nominal values of 470 k ? and 4.7 f giv e sat i sf act o ry result s in most cases. ana in 20 27 analog input : the analog input transfers analog signal to the chip for recording. for microphone inputs, the ana out pin should be connected via an external capacitor to the ana in pin. this capacitor value, together with the 3.0 k ? input impedance of ana in, is selected to give additional cutoff at the low-frequency end of the voice passband. if the desired i nput is derived from a source other than a microphone, the signal can be fed, capacitively coupled, into the ana in pin directly. publ i c at i on rel e ase dat e : june 2003 - 7 - revi si on 1.0
ISD2532/40/48/64 pin no. pin name soic/ pdip tsop function ana out 21 28 analog output : this pin provides the preamplifier output to the user. the voltage gain of the pr eamplifier is determined by the voltage level at the agc pin. ovf 2 2 1 ov erflow : this signal pulses low at the end of memory array, indicating the device has been filled and the message has overflowed. the ovf output then follows the ce input until a pd pulse has reset the device. this pin can be used to cascade several isd2500 devices together to increase record/playback durations. ce 2 3 2 chip enable : the ce input pin is taken low to enable all playback and record operations. the address pins and playback/record pin (p/ r ) are latched by the falling edge of ce . ce has additional functionality in the m6 (push-button) operational mode as described in the operational mode section. p d 2 4 3 p o we r d o wn : when neither record nor playback operation, the pd pin should be pulled high to place the part in standby mode (see i sb specification). when overflow ( ovf ) pulses low for an overflow condition, pd should be brought high to reset the address pointer back to the beginning of the memory array. the pd pin has additional functionality in the m6 (push-button) operation mode as described in the operational mode section. eom 2 5 4 end-of-message : a nonvolatile marker is automatically inserted at the end of each recorded message. it remains there until the message is recorded over. the eom output pulses low for a period of t eom at the end of each message. in addition, the isd2500 series has an internal v cc detect circuit to maintain message integrity should v cc fall below 3.5v. in this c a s e , eom goes low and the device is fixed in playback-only mode. when the device is configured in operational mode m6 (push- button mode), this pin provides an active-high signal, indicating the device is currently recordi ng or playing. this signal can conveniently drive an led for vis ual indicator of a record or playback operation in process. - 8 -
ISD2532/40/48/64 pin no. pin name soic/ pdip tsop function x c l k 2 6 5 external clock : the external clock input has an internal pull-down device. the device is configured at the factory with an internal sampling clock frequency centered to 1 percent of specification. the frequency is then maintained to a variation of 2.25 percent over the entire commercial temperature and operating voltage ranges. if greater precision is r equired, the device can be clocked through the xclk pin as follows: part number sample rate required clock ISD2532 8.0 khz 1024 khz isd2540 6.4 khz 819.2 khz isd2548 5.3 khz 682.7 khz isd2564 4.0 khz 512 khz these recommended clock rates should not be varied because the antialiasing and smoothing filters ar e fixed, and aliasing problems can occur if the sample rate differs from the one recommended. the duty cycle on the input clock is not critical, as the clock is immediately divided by two. if the xclk is not used, this input must be connected to ground. p/ r 2 7 6 play back/record : the p/ r input pin is latched by the falling edge of the ce pin. a high level selects a playback cycle while a low level selects a record cycle. for a record cycle, the address pins provide the starting address and re cording continues until pd or ce is pulled high or an overflow is detected (i.e. the chip is full). when a record cycle is terminated by pulling pd or ce high, then end-of-message ( eom ) marker is stored at the current address in memory. for a play back cycle, the address inputs provide the starting address and the device will play until an eom marker is encountered. the device can continue to pass an eom marker if ce is held low in address mode, or in an operational mode. (see operational modes section) publ i c at i on rel e ase dat e : june 2003 - 9 - revi si on 1.0
ISD2532/40/48/64 7. functional description 7.1. d eta i led d escription speech/sound quality the winbond?s isd2500 series includes devices offe red at 4.0, 5.3, 6. 4, and 8.0 khz sampling frequencies, allowing the user a choice of speech quality options. increasing the duration within a product series decreases the sampling frequency and bandwidth, which affects the sound quality. please refer to the ISD2532/40/48/64 product summa ry table below to compare the duration, sampling frequency and filter pass band. the speech samples are stored directly into the on- chip nonvolatile memory without any digitization and compression associated like other solutions. dire ct analog storage provides a very true, natural sounding reproduction of voice, music, tones, and sound effects not available with most solid state digital solutions. duration to meet various system require ments, the ISD2532/40/48/64 products offer single-chip solutions at 32, 40, 48, and 64 seconds. parts may also be cascaded together for longer durations. table 1: ISD2532/40/48/64 product summary part number d u r a t i o n (seconds) input sample rate (khz) ty pical filter pass band * (khz) i s d 2 5 3 2 3 2 8 . 0 3 . 4 i s d 2 5 4 0 4 0 6 . 4 2 . 7 i s d 2 5 4 8 4 8 5 . 3 2 . 3 i s d 2 5 6 4 6 4 4 . 0 1 . 7 * 3db roll off point. t h is parameter is not checked during production testing and may vary due to process variations and other fa ctors. t herefore, customer s hould not rely on this value for testing purposes. eeprom storage one of the benefits of winbond?s chipcorder ? technology is the use of on-chip nonvolatile memory, providing zero-power message storage. the message is retained for up to 100 years typically without power. in addition, the device can be re -recorded typically over 100,000 times. microcontroller interface in addition to its simplicity and ease of use, the is d2500 series includes all the interfaces necessary for microcontroller-driven applications. the addr ess and control lines can be interfaced to a microcontroller and manipulated to perform a vari ety of tasks, including message assembly, message concatenation, predefined fixed mess age segmentation, and message management. - 10 -
ISD2532/40/48/64 programming the isd2500 series is also ideal for playback-onl y applications, where single or multiple messages are referenced through buttons, switches, or a microcontroller. once the desired message configuration is created, duplicates c an easily be generated via a gang programmer. 7.2. o p e r at i o n al m odes the isd2500 series is designed with several built -in operational modes that provide maximum functionality with minimum external components. t hese modes are described in details as below. the operational modes are accessed via the address pins and mapped beyond the normal message address range. when the two most significant bi ts (msb), a7 and a8, are high, the remaining address signals are interpreted as mode bits and not as address bits. therefore, operational modes and direct addressing are not compat ible and cannot be used simultaneously. there are two important considerations for using o perational modes. first, all operations begin initially at address 0 of its memory. later operations can begin at other address locations, depending on the operational mode(s) chosen. in addition, the addre ss pointer is reset to 0 when the device is changed from record to playback, playback to record (except m6 mode), or when a power-down cycle is executed. second, operational modes are executed when ce goes low. this operational mode remains in effect until the next low-going ce signal, at which point the current mode(s) are sampled and executed. table 2: operational modes mode [1] function ty pical use jointly compatible [2] m0 message cueing fast-forward through messages m4, m5, m6 m1 delete eom markers position eom marker at the end of the last message m3, m4, m5, m6 m 2 n o t a p p l i c a b l e r e s e r v e d n / a m3 looping continuous playback from address 0 m1, m5, m6 m 4 c o n s e c u t i v e addressing record/playback multiple consecutive messages m0, m1, m5 m5 ce level-activated allows message pausing m0, m1, m3, m4 m6 push-button control simplified device interface m0, m1, m3 [1 ] besides mode pin needed to be ?1?, a7 and a8 pin are also requir ed to be ?1? in order to enter into the related operational mode. [2 ] indicates additional operational modes w h ich c an be used simultaneously w i th the given mode. publ i c at i on rel e ase dat e : june 2003 - 11 - revi si on 1.0
ISD2532/40/48/64 7.2.1. operational modes description the operational modes can be used in conjunction with a microcontroller, or they can be hardwired to provide the desired system operation. m0 ? message cueing message cueing allows the user to skip through messages, without knowing the actual physical addresses of each message. each ce low pulse causes the internal address pointer to skip to the next message. this mode is used for playback only, and is typically used with the m4 operational mode. m1 ? delete eom markers the m1 operational mode allows sequentially recorded messages to be combined into a single message with only one eom marker set at the end of the final message. when this operational mode is configured, messages recorded sequentia lly are played back as one continuous message. m2 ? unused when operational modes are selected, the m2 pin should be low. m3 ? message looping the m3 operational mode allows for the automat ic, continuously repeated playback of the message located at the beginning of the address space. a message can completely fill the isd2500 device and will loop from beginning to end without ovf going low. m4 ? consecutiv e addressing during normal operation, the address pointer will reset when a message is played through an eom marker. the m4 operational mode inhibits the address pointer reset on eom , allowing messages to be played back consecutively. m5 - ce -lev el activ a ted the default mode for isd2500 devices is for ce to be edge-activated on playback and level- activated on record. the m5 operational mode causes the ce pin to be interpreted as level- activated as opposed to edge-activated during playback. this is especially useful for terminating playback operations using the ce signal. in this mode, ce low begins a playback cycle, at the beginning of the device memory. the pl ayback cycle continues as long as ce is held low. when ce goes high, playback will immediately end. a new ce low will restart the message from the beginning unless m4 is also high. - 12 -
ISD2532/40/48/64 m6 ? push-button mode the isd2500 series contain a push-button oper ational mode. the push-button mode is used primarily in very low-cost applications and is des igned to minimize external circuitry and components, thereby reducing system cost. in order to configur e the device in push-butt on operational mode, the two most significant address bits must be high, and the m6 mode pin must also be high. a device in this mode always powers down at the end of each playback or record cycle after ce goes high. when this operational mode is implemented, thr ee of the pins on the device have alternate functionality as described in the table below. table 3: alternate functionality in pins pin name alternate functionality in push-button mode ce start/pause push-button (low pulse-activated) pd stop/reset push-button (high pulse-activated) eom ac tive-high run indic a tor ce (start/pause) in push-button operational mode, ce acts as a low-going pulse-activated start/pause signal. if no operation is currently in progress, a low-going pulse on this signal will initiate a playback or record cycle according to the level on the p/ r pin. a subsequent pulse on the ce pin, before an eom is reached in playback or an overflow condi tion occurs, will pause the current operation, and the address counter is not reset. another ce pulse will cause the device to continue the operation from the place where it is paused. pd (stop/reset) in push-button operational mode, pd acts as a high-going pulse-activated stop/reset signal. when a playback or record cycle is in progre ss and a high-going pulse is observed on pd, the current cycle is terminated and the address pointer is reset to address 0, the beginning of the message space. eom (run) in push-button operational mode, eom becomes an active-high run signal which can be used to drive an led or other external device. it is high whenever a record or playback operation is in progress. recording in push-button mode 1. the pd pin should be low, usually using a pull-down resistor. publ i c at i on rel e ase dat e : june 2003 - 13 - revi si on 1.0
ISD2532/40/48/64 2. the p/ r pin is taken low. 3. the ce pin is pulsed low. recording starts, eom goes high to indicate an operation in progress. 4. when t h e ce pin is pulsed low. recording pauses, eom goes back low. the internal address pointers are not cleared, but the eom marker is stored in memory to indicate as the message end. the p/ r pin may be taken high at this time. any subsequent ce would start a playback at address 0. 5 . t h e ce pin is pulsed low. recording starts at the next address after the previous set eom marker. eom goes back high. [3] 6. when the recording sequences are finished, the final ce pulse low will end the last record cycle, leaving a set eom marker at the message end. recording may also be terminated by a high level on pd, which will leave a set eom marker. play back in push-button mode 1. the pd pin should be low. 2. the p/ r pin is taken high. 3 . t h e ce pin is pulsed low. playback starts, eom goes high to indicate an operation in progress. 4. if t h e ce pin is pulsed low or an eom marker is encountered during an operation, the part will pause. the internal address pointers are not cleared, and eom goes back low. the p/ r pin may be changed at this time. a subsequent record operation would not reset the address pointers and the re cording would begin where playback ended. 5. ce is again pulsed low. playback starts where it left off, with eom going high to indicate an operation in progress. 6. playback continues as in steps 4 and 5 unt il pd is pulsed high or overflow occurs. 7. if in overflow, pulling ce low will reset the address pointer and start playback from the beginning. after a pd pulse, the part is reset to address 0. note: push-button mode can be used in conjunction w i th modes m0, m1, and m3. [3 ] if the m1 operational mode pin is also high, the just previously w r itten eom bit is erased, and recording starts at that address. - 14 -
ISD2532/40/48/64 good audio design practices winbond chipcorder ? products are very high-quality single-chip voice recording and playback devices. to ensure the highest qua lity voice reproduction, it is important that good audio design practices on layout and power supply decoupling are fo llowed. please refer to application information section of chipcorder ? products in winbond website ( www.winbond-usa.com ) for details. good audio design practices (apin11.pdf) single-chip board layout diagrams (apin12.pdf) publ i c at i on rel e ase dat e : june 2003 - 15 - revi si on 1.0
ISD2532/40/48/64 8. timing diagrams don' t car e don' t car e ce p/r pd a0 - a 8 mi c an a i n ov f t ce t set t ho l d t pdh t se t t pud t pds t pd r t ovf do n' t ca re do n' t ca re figure 1: record don ' t car e ce p/r pd a0 - a 8 sp+/ - ov f t ce t se t t ho l d t pd h t se t t pd s t pd p t ovf t eom t pu d eo m don ' t car e don't care do n't care figure 2: playback - 16 -
ISD2532/40/48/64 t ce ce p/r pd a0 - a 8 mi c a n a i n ov f eo m (s tart /pa u s e ) (s top / re s e t) (r un ) not e s ( 1) ( 2 ) ( 3) (4, 5) (6, 7) (8) t ce t ce t set t set t set t set t se t t set t pd t pa u s e t ru n t db t db t db t pu d t pu d st art s ta r t pa u s e s to p figure 3: push-button mode record ce p/r pd a0 - a 8 sp+/- ov f eo m ( s tar t /p ause) ( s t op/r e se t) (run ) n o tes ( 1 ) (2 ) ( 3) (4 , 5) (6 , 7 ) (8) t ce t ce t se t t se t t se t t set t set t se t t pd t pau se t ru n t db t db t db t pu d t pu d st a r t s tart pau s e s t o p figure 4: push-button mode playback publ i c at i on rel e ase dat e : june 2003 - 17 - revi si on 1.0
ISD2532/40/48/64 notes for push-button modes: 1. a8, a7, and a6 = 1 for push-button operation. 2. t he f i r s t ce low pulse performs a start function. 3. t he part w ill begin to play or record after a pow er-up delay t pu d . 4. t he part must have ce high for a debounce period t db before it w ill recognize another falling edge of ce and pause. 5. t he s e c o n d ce low pulse, and every even pulse ther eafter, performs a pause function. 6. again, the part must have ce high for a debounce period t db before it w ill recognize another falling edge of ce , w h ich w ould restart an operation. in addition, the part w ill not do an internal pow er dow n until ce is high for the t db time. 7. t he t h i r d ce low pulse, and every odd pulse therea fter, performs a resume function. 8. at any time, a high level on pd w ill stop the current function, reset t he address counter, and pow er dow n the device. - 18 -
ISD2532/40/48/64 9. absolute maximum ratings table 4: absolute maximum ratings (die) conditions values junction temperature 150 c storage temperature range -65 c to + 150 c voltage applied to any pad (v ss ?0.3v) to (v cc + 0 .3v) voltage applied to any pad (input current limited to 20ma) (v ss ?1.0v) to (v cc + 1 .0v) v cc ? v ss -0.3v to + 7 .0v table 5: absolute maximum ratings (packaged parts) conditions values junction temperature 150 c storage temperature range -65 c to + 150 c voltage applied to any pin (v ss ?0.3v) to (v cc + 0 .3v) voltage applied to any pin (input current limited to 20 ma) (v ss ?1.0v) to (v cc + 1 .0v) lead temperature (soldering ? 10sec) 300 c v cc ? v ss -0.3v to + 7 .0v note: stresses above those listed may cause pe rmanent damage to the devic e. exposure to the absolute maximum ratings may affect dev ice reliability and performance. functional operation is not impli ed at these conditions. publ i c at i on rel e ase dat e : june 2003 - 19 - revi si on 1.0
ISD2532/40/48/64 9.1 o pera t ing c onditions table 6: operating conditions (die) conditions values commercial operating temperature range 0 c to + 5 0 c supply voltage (v cc ) [1] + 4 .5v to + 6 .5v ground voltage (v ss ) [2] 0v table 7: operating conditions (packaged parts) conditions values commercial operating temperature range [3] 0 c to + 7 0 c supply voltage (v cc ) [1] + 4 .5v to + 5 .5v ground voltage (v ss ) [2] 0v notes: [ 1 ] v cc = v cca = v ccd [ 2 ] v ss = v ssa = v ssd [ 3 ] case t e mperature - 20 -
ISD2532/40/48/64 10. electrical characteristics 10.1. p a r a m eters f or p a cka ged p ar t s table 8: dc parameters ? packaged parts parameters symbol min [2] typ [1] max [2] units conditions input low voltage v il 0 . 8 v input high voltage v ih 2 . 0 v output low voltage v ol 0 . 4 v i ol = 4.0 ma output high voltage v oh v cc - 0.4 v i oh = -10 a ovf output high voltage v oh1 2 . 4 v i oh = -1.6 ma eom output high voltage v oh2 v cc ? 1.0 v cc - 0.8 v i oh = -3.2 ma v cc current (operating) i cc 2 5 3 0 m a r ext = ? [3] v cc current (standby) i sb 1 1 0 a [3] input leakage current i il r 1 a input current high w/pull down i ilpd 1 3 0 a force v cc [4] output load impedance r ext 1 6 s p e a k e r l o a d preamp input resistance r mi c 4 9 1 5 k mic and mic ref pins aux in input resistance r aux 5 1 1 2 0 k ana in input resistance r ana in 2 . 3 3 5 k preamp gain 1 a pre1 21 24 26 db agc = 0.0v preamp gain 2 a pre2 -15 5 db agc = 2.5v aux in/sp+ gain a aux 0 . 9 8 1 . 0 v / v ana in to sp+ /- gain a arp 2 1 2 3 2 6 d b agc output resistance r agc 2 . 5 5 9 . 5 k n o t e s : [1 ] ty pical values @ t a = 25o and v cc = 5.0v. [2 ] all min/max limits are guaranteed by winbond via electrical test ing or characterization. no t all specifications are 100 percent tested. [3 ] v cca and v ccd connected together. [4 ] xclk pin only . publ i c at i on rel e ase dat e : june 2003 - 21 - revi si on 1.0
ISD2532/40/48/64 table 9: ac parameters ? packaged parts characteristic symbol min [2] typ [1] max [2] units conditions sampling frequency ISD2532 isd2540 isd2548 isd2564 f s 8.0 6.4 5.3 4.0 khz khz khz khz [7] [7] [7] [7] filter pass band ISD2532 isd2540 isd2548 isd2564 f cf 3.4 2.7 2.3 1.7 khz khz khz khz 3 db roll-off point [3][8] 3 db roll-off point [3][8] 3 db roll-off point [3][8] 3 db roll-off point [3][8] record duration ISD2532 isd2540 isd2548 isd2564 t rec 32 40 48 64 sec sec sec sec [7] [7] [7] [7] playback duration ISD2532 isd2540 isd2548 isd2564 t play 32 40 48 64 sec sec sec sec [7] [7] [7] [7] ce pulse width t ce 1 0 0 n s e c control/address setup time t set 3 0 0 n s e c control/address hold time t hold 0 n s e c power-up delay ISD2532 isd2540 isd2548 isd2564 t pud 25.0 31.0 37.0 50.0 msec msec msec msec - 22 -
ISD2532/40/48/64 table 9: ac parameters ? packaged parts (cont?d) characteristic symbol min [2] typ [1] max [2] units conditions pd pulse width (record) ISD2532 isd2540 isd2548 isd2564 t pd r 25.0 31.25 37.5 50.0 msec msec msec msec pd pulse w i dth (play ) ISD2532 isd2540 isd2548 isd2564 t pd p 12.5 15.625 18.75 25.0 msec msec msec msec pd pulse w i dth (static) t pd s 1 0 0 n s e c [6 ] pow e r dow n hold t pd h 0 n s e c eom pulse w i dth ISD2532 isd2540 isd2548 isd2564 t eom 12.5 15.625 18.75 25.0 msec msec msec msec overflow pulse w i dth t ovf 6 . 5 s e c t o tal harmonic distortion t hd 1 2 % @ 1 khz speaker output pow e r p out 1 2 . 2 5 0 mw r ex t = 16 [4 ] voltage across speaker pins v out 2 . 5 v p - p r ex t = 600 , aux in=1.25vp-p mic input voltage v in1 2 0 m v peak-to-peak [5 ] ana in input voltage v in2 5 0 m v p e a k - t o - p e a k aux input voltage v in3 1 . 2 5 v p e a k - t o - p e a k ; r ex t = 16 notes: [1 ] [2 ] [3 ] [4 ] [5 ] [6 ] [7 ] [8 ] ty pical values @ t a = 25oc, v cc = 5.0v and timing measured at 50% levels. all min/max limits are guaranteed by winbond via electrical testing or c haracterization. not all s pecifications are 100 percent tested. low -frequency cutoff depends upon the value of ex ternal capacitors (see pin descriptions) from aux in; if ana in is driven at 50 mv p-p, the p out = 12.2 mw, ty pical. with 5.1 k series resistor at ana in. t pds is required during a static condition, ty pically overflow . sampling frequency and duration can vary as much as r 2.25 percent over the commercial temperature range. for greater stability , an ex ter nal clock can be utilized ( s ee pin descr iptions) filter specification applies to the antialia sing filter and the smoothing filter. theref ore, from input to output, expect a 6 d b drop by nature of passing through both filters. publ i c at i on rel e ase dat e : june 2003 - 23 - revi si on 1.0
ISD2532/40/48/64 10.1.1. ty pical parameter variation w i th voltage and temperature - packaged parts -4 0 2 5 7 0 8 5 t e mper atur e (c) 5. 5 v o lts 4.5 v o lts pe r cent c h a nge (% ) -1 . 0 -0 . 8 -0 . 6 -0 . 4 -0 . 2 0 0.2 0.4 chart 4: oscillat o r st abilit y -4 0 2 5 7 0 8 5 t e m p er at u r e ( c ) 5 . 5 v o lt s 4. 5 v o lts 0 5 10 15 20 25 ope r a t ing c u r r e nt (m a) c h art 1: r e co rd m o d e op erat in g current (i cc ) -4 0 2 5 7 0 8 5 t e m p er at u r e ( c ) 5 . 5 v o lt s 4. 5 v o lts p e r cent d i s t or tion (% ) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 cha r t 2 : tota l ha rmonic dis t ortion -4 0 2 5 7 0 8 5 t e mper atur e (c) 5. 5 v o lts 4.5 v o lts s t a ndby c u r r e nt (ma ) 0 0.2 0.4 0.6 0.8 1.0 1.2 cha r t 3 : sta ndb y curre nt (i sb ) - 24 -
ISD2532/40/48/64 10.2. p a r a m eters f or d ie table 10: dc parameters ? die parameters symbol min [2] typ [1] max [2] units conditions input low voltage v il 0 . 8 v input high voltage v ih 2 . 0 v output low voltage v ol 0 . 4 v i ol = 4.0 ma output high voltage v oh v cc - 0.4 v i oh = -10 a ovf output high voltage v oh1 2 . 4 v i oh = -1.6 ma eom output high voltage v oh2 v cc ? 1.0 v cc - 0.8 v i oh = -3.2 ma v cc current (operating) i cc 2 5 3 0 m a r ext = ? [3] v cc current (standby) i sb 1 1 0 a [2] input leakage current i il r 1 a input current high w/pull down i ilpd 1 3 0 a force v cc [4] output load impedance r ext 1 6 s p e a k e r l o a d preamp in input resistance r mi c 4 9 1 5 k mic and mic ref pads aux in input resistance r aux 5 1 1 2 0 k ana in input resistance r ana in 2 . 3 3 5 k preamp gain 1 a pre1 21 24 26 db agc = 0.0v preamp gain 2 a pre2 -15 5 db agc = 2.5v aux in/sp+ gain a aux 0 . 9 8 1 . 0 v / v ana in to sp+ /- gain a arp 2 1 2 3 2 6 d b agc output resistance r agc 2 . 5 5 9 . 5 k notes: [1 ] ty pical values @ t a = 25 q c and v cc = 5.0v. [2 ] all min/max limits are guaranteed by winbond via electrical test ing or characterization. no t all specifications are 100 percent tested. [3 ] v cca and v ccd connected together. [4 ] xclk pad only . publ i c at i on rel e ase dat e : june 2003 - 25 - revi si on 1.0
ISD2532/40/48/64 table 11: ac parameters ? die characteristic symbol min [2] typ [1] max [2] units conditions sampling frequency ISD2532 isd2540 isd2548 isd2564 f s 8.0 6.4 5.3 4.0 khz khz khz khz [7] [7] [7] [7] filter pass band ISD2532 isd2540 isd2548 isd2564 f cf 3.4 2.7 2.3 1.7 khz khz khz khz 3 db roll-off point [3][8] 3 db roll-off point [3][8] 3 db roll-off point [3][8] 3 db roll-off point [3][8] record duration ISD2532 isd2540 isd2548 isd2564 t rec 32 40 48 64 sec sec sec sec [7] [7] [7] [7] playback duration ISD2532 isd2540 isd2548 isd2564 t play 32 40 48 64 sec sec sec sec [7] [7] [7] [7] ce pulse width t ce 1 0 0 n s e c control/address setup time t set 3 0 0 n s e c control/address hold time t hold 0 n s e c power-up delay ISD2532 isd2540 isd2548 isd2564 t pud 25.0 31.3 37.5 50.0 msec msec msec msec - 26 -
ISD2532/40/48/64 table 11: ac parameters ? die (cont?d) characteristic symbol min [2] typ [1] max [2] units conditions pd pulse w i dth (record) ISD2532 isd2540 isd2548 isd2564 t pd r 25.0 31.25 37.5 50.0 msec msec msec msec pd pulse w i dth (play ) ISD2532 isd2540 isd2548 isd2564 t pd p 12.5 15.625 18.75 25.0 msec msec msec msec pd pulse w i dth (static) t pd s 1 0 0 n s e c [6 ] pow e r dow n hold t pd h 0 n s e c eom pulse w i dth ISD2532 isd2540 isd2548 isd2564 t eom 12.5 15.625 18.75 25.0 msec msec msec msec overflow pulse w i dth t ovf 6 . 5 s e c t o tal harmonic distortion t hd 1 2 % @ 1 khz speaker output pow e r p out 1 2 . 2 5 0 mw r ex t = 16 [4 ] voltage across speaker pins v out 2 . 5 v p - p r ex t =600 , aux in=1.25vp-p mic input voltage v in1 2 0 m v peak-to-peak [5 ] ana in input voltage v in2 5 0 m v p e a k - t o - p e a k aux input voltage v in3 1 . 2 5 v p e a k - t o - p e a k ; r ex t = 16 no te s : [1 ] t y pical v a lues @ t a = 25 q c, v cc = 5.0v and timing measured at 50% levels . [2 ] a ll min/max limits are guaranteed by w i nbond v i a electrical testi ng or characterization. n o t all specifications are 100 percent tested. [3 ] low -frequency cutoff depends upon the v a lue of ex ternal capacitors (see p i n d e scriptions) [4 ] f r om a u x in ; if a n a in is driv en at 50 mv p-p, the p out = 12.2 mw , ty pical. [5 ] w i th 5.1 k series resistor at a n a in. [6 ] t pds is required during a static condition, ty pically ov erflow . [7 ] s a mpling f r equency and play back d u ration can v a ry as much as r 2.25 percent ov er the commercial temperature range. for greater stability , an ex ternal clock can be utilized (see pin descriptions) [8 ] f ilter specification applies to the antialiasing filter and the sm oothing filter. t herefore, from input to output, ex pect a 6 d b drop by nature of passing through both filters. publ i c at i on rel e ase dat e : june 2003 - 27 - revi si on 1.0
ISD2532/40/48/64 10.2.1. ty pical parameter variation w i th voltage and temperature - die -4 0 2 5 5 0 t e mper atur e (c) pe r cent c h a nge (% ) -1 . 0 -0 . 8 -0 . 6 -0 . 4 -0 . 2 0 0.2 chart 8: oscillat o r st abilit y 6.5 v o lts 5.5 vo lts 4.5 v o l t s -4 0 2 5 5 0 t e m p er at u r e ( c ) p e r cent d i s t or tion (% ) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 cha r t 6 : tota l ha rmonic dis t ortion 6.5 v o lts 5.5 v o l t s 4 . 5 v o l t s 5 10 15 20 25 30 -4 0 2 5 5 0 t e m p er at u r e ( c ) 0 ope r a t ing c u r r e nt (m a) c h art 5: r e co rd m o d e op erat in g current (i cc ) 6.5 v o lts 5.5 vo lts 4.5 v o lts -4 0 2 5 5 0 t e mper atur e (c) s t a ndby c u r r e nt (ma ) 0 cha r t 7 : sta ndb y curre nt (i sb ) 0.2 0.4 0.6 0.8 1.0 6.5 v o lts 5.5 vo lts 4.5 v o l t s - 28 -
ISD2532/40/48/64 10.3. p a r a m eters f or p ush -b utton m ode table 12: parameters for push-button mode parameters symbol min [2] typ [1] max [2] units conditions ce pulse width (start/paus e) t ce 3 0 0 n s e c control/address setup time t set 3 0 0 n s e c power-up delay ISD2532 isd2540 isd2548 isd2564 t pud 25.0 31.25 37.25 50.0 msec msec msec msec pd pulse width (stop/restart) t pd 3 0 0 n s e c ce to eom high t run 2 5 4 0 0 n s e c ce to eom low t pause 5 0 4 0 0 n s e c ce high debounce ISD2532 isd2540 isd2548 isd2564 t db 70 85 105 135 105 135 160 215 msec msec msec msec notes: [1 ] ty pical values @ t a = 25 c, v cc = 5.0v and timing measured at 50% levels. [2 ] all min/max limits are guaranteed by winbond via electrical test ing or characterization. no t all specifications are 100 percent tested. publ i c at i on rel e ase dat e : june 2003 - 29 - revi si on 1.0
ISD2532/40/48/64 11. typical application circuit v cc v cc d v cc a v ss d v ssa sp + sp- m i c re f mic ag c au x i n an a i n an a o u t a0 a1 a2 a3 a4 a5 a6 a7 a8 ce pd p/r oe m ov f xc l k 100 k ? r4 v ss ch i p e n a b l e pow e r do w n p l a y ba ck /r e c or d c3 0. 1 f 5. 1 k ? r6 c2 4. 7 f 470 k ? r2 c5 0. 1 f 10 k ? r5 el ect r et mi cro pho n e spea ker 16 ? v cc c6 0. 1 f c7 0. 1 f c8 22 f v cc c1 0.1 f c4 220 f 1 k ? r1 10 k ? r3 i s d2532/40/ 48/64 1 2 3 4 5 6 7 9 10 23 24 27 25 22 26 19 17 18 21 20 11 15 14 13 12 16 28 (not e) figure 5: design schematic note: if desired, pin 18 (pdip package) may be left unc onnected (microphone preamplifier noise w ill be higher). in this case, pin 18 must not be tied to any other signal or voltage. additional des ign example schematics are provided below . - 30 -
ISD2532/40/48/64 table 13: application example ? basic device control control step function action 1 power up chip and select record/playback mode 1. pd = low, 2. p/ r = as desired 2 set message address for record/playback set addresses a0-a8 3 a b e g i n p l a y b a c k p/ r = hi gh, ce = pulse low 3 b b e g i n r e c o r d p/ r = low, ce = low 4 a e n d p l a y b a c k a u t o m a t i c 4 b e n d r e c o r d pd or ce = hi gh table 14: application example ? passive component functions parts function c o mment s r1 microphone power supply decoupli ng reduces power supply noise r2 release time constant sets release time for agc r3, r5 microphone biasing resistors pr ovides biasing for microphone operation r4 series limiting resistor reduces level to prevent distortion at higher supply voltages r6 series limiting resistor reduc es level to high supply voltages c1, c5 microphone dc-blocking capacitor low- frequency cutoff decouples microphone bias from chip. provides single-pole low-frequency cutoff and command mode noise rejection. c2 attac k / releas e time c ons tant sets attac k / releas e time for agc c3 low-frequency cutoff capacitor prov ides additional pole for low-frequency c u toff c4 microphone power supply decoupli ng reduces power supply noise c6, c7, c8 power supply capacitors filter and bypass of power supply publ i c at i on rel e ase dat e : june 2003 - 31 - revi si on 1.0
ISD2532/40/48/64 s2 v cc u 1 pb 0 pb 1 pa 0 pa 1 osc 1 osc 2 re se t ir q pa 2 pa 3 pa 4 pa 5 pa 6 pa 7 v dd v ss s1 26 u 2 v cc d v cc a v ss d v ssa sp+ sp - m i c re f mic agc aux i n an a i n an a o u t a0 a1 a2 a3 a4 a5 a6 a7 a8 ce pd p/r oem ovf xc l k is d 2532/ 40/48/ 64 1 2 3 4 5 6 7 9 10 23 24 27 25 22 19 17 18 21 20 11 15 14 13 12 16 28 s3 re c o rd p l a y ms g # m c 68h c 705k 1a ru n d 1 r 1 t bd figure 6: ISD2532/40/48/64 applicatio n example ? microcontroller/isd2500 interface in this simplified block diagram of a microcont roller application, the push-button mode and message cueing are used. the microcontroller is a 16-pin version with enough port pins for buttons, an led, and the isd2500 series device. the software can be written to use three buttons: one each for play and record, and one for message selection. because t he microcontroller is interpreting the buttons and commanding the isd2500 device, software can be wr itten for any function desired in a particular application. note: winbond does not recommend connecting address lines directly to a microprocessor bus. address lines should be externally latched. - 32 -
ISD2532/40/48/64 is d2532 /40/48 /64 v cc d v cc a v ss d v ss a sp+ sp- mic r e f mic ag c aux i n an a i n an a o u t a0 a1 a2 a3 a4 a5 a6 a7 a8 ce pd p/r oem ov f xc l k c2 4.7 f 47 0 k ? r2 c5 0.1 f 10 k ? r5 e l ec t r et mi cr o p ho n e sp ea k e r 16 ? v cc c1 0.1 f c4 220 f 1 k ? r1 10 k ? r3 c3 0.1 f 5.1 k ? r4 v cc c4 0.1 f c1 0.1 f c5 2 2 f 19 17 18 21 20 11 15 14 13 12 16 28 1 00 k r7 v ss st a r t / pa use st op/rese t pl a y ba c k /reco r d 1 2 3 4 5 6 7 9 10 23 24 27 25 22 26 v cc v cc v cc (note) r6 100 k ? figure 7: ISD2532/40/48/64 appli cation example ? push-button note: please refer to page 13 for more details. publ i c at i on rel e ase dat e : june 2003 - 33 - revi si on 1.0
ISD2532/40/48/64 table 15: application example ? push-button control control step function action 1 select record/playback mode p/ r = as desired 2 a b e g i n p l a y b a c k p/ r = hi gh, ce = pulse low 2 b b e g i n r e c o r d p/ r = low, ce = pulse low 3 pause record or playback ce = pulsed low 4 a e n d p l a y b a c k automatic at eom marker or pd = pulsed high 4b end record pd = pulsed high table 16: application example ? passive component functions parts function c o mment s r2 release time constant sets release time for agc r4 series limiting resistor reduces level to prevent distortion at higher supply voltages r6, r7 pull-up and pull-down resistors defines static state of inputs c1, c4, c5 power supply capacitors filters and bypass of power supply c2 attac k / releas e time c ons tant sets attac k / releas e time for agc c3 low-frequency cutoff capacitor prov ides additional pole for low-frequency c u toff - 34 -
ISD2532/40/48/64 12. package drawing and dimensions 12.1. 28-l ea d 300-m il p la stic s ma ll o utline ic (soic) 28 27 26 25 24 23 22 21 20 19 18 1 7 16 15 1 2 3 45 6 7 8 91 0 11 12 1 3 14 a d e f b g c h inches millimeters min nom max min nom max a 0 . 7 0 1 0 . 7 0 6 0 . 7 1 1 1 7 . 8 1 1 7 . 9 3 1 8 . 0 6 b 0 . 0 9 7 0 . 1 0 1 0 . 1 0 4 2 . 4 6 2 . 5 6 2 . 6 4 c 0 . 2 9 2 0 . 2 9 6 0 . 2 9 9 7 . 4 2 7 . 5 2 7 . 5 9 d 0 . 0 0 5 0 . 0 0 9 0 . 0 1 1 5 0 . 1 2 7 0 . 2 2 0 . 2 9 e 0 . 0 1 4 0 . 0 1 6 0 . 0 1 9 0 . 3 5 0 . 4 1 0 . 4 8 f 0 . 0 5 0 1 . 2 7 g 0 . 4 0 0 0 . 4 0 6 0 . 4 1 0 1 0 . 1 6 1 0 . 3 1 1 0 . 4 1 h 0 . 0 2 4 0 . 0 3 2 0 . 0 4 0 0 . 6 1 0 . 8 1 1 . 0 2 note: lead coplanarity to be w i thin 0.004 inches. publ i c at i on rel e ase dat e : june 2003 - 35 - revi si on 1.0
ISD2532/40/48/64 12.2. 28-l ea d 600-m il p la stic d ua l i nline p a cka ge (pdip) inches millimeters min nom max min nom max a 1 . 4 4 5 1 . 4 5 0 1 . 4 5 5 3 6 . 7 0 3 6 . 8 3 3 6 . 9 6 b 1 0 . 1 5 0 3 . 8 1 b 2 0 . 0 6 5 0 . 0 7 0 0 . 0 7 5 1 . 6 5 1 . 7 8 1 . 9 1 c 1 0 . 6 0 0 0 . 6 2 5 1 5 . 2 4 1 5 . 8 8 c 2 0 . 5 3 0 0 . 5 4 0 0 . 5 5 0 1 3 . 4 6 1 3 . 7 2 1 3 . 9 7 d 0 . 1 9 4 . 8 3 d 1 0 . 0 1 5 0 . 3 8 e 0 . 1 2 5 0 . 1 3 5 3 . 1 8 3 . 4 3 f 0 . 0 1 5 0 . 0 1 8 0 . 0 2 2 0 . 3 8 0 . 4 6 0 . 5 6 g 0 . 0 5 5 0 . 0 6 0 0 . 0 6 5 1 . 4 0 1 . 5 2 1 . 6 2 h 0 . 1 0 0 2 . 5 4 j 0 . 0 0 8 0 . 0 1 0 0 . 0 1 2 0 . 2 0 0 . 2 5 0 . 3 0 s 0 . 0 7 0 0 . 0 7 5 0 . 0 8 0 1 . 7 8 1 . 9 1 2 . 0 3 q 0 1 5 0 1 5 - 36 -
ISD2532/40/48/64 publ i c at i on rel e ase dat e : june 2003 - 37 - revi si on 1.0 12.3. 28-l ea d 8 x 13.4 mm p la stic t hin s ma ll o utline p a cka ge (tsop) t ype 1 mi n n o m ma x m i n n o m m a x a 0. 5 2 0 0 . 528 0. 53 5 1 3. 20 13. 4 0 1 3 . 6 0 b 0. 4 6 1 0 . 465 0. 46 9 1 1. 70 11. 8 0 1 1 . 9 0 c 0. 3 1 1 0 . 315 0. 31 9 7 . 9 0 8 . 0 0 8 . 1 0 d 0. 0 0 2 0 . 0 0 6 0. 0 5 0. 15 e 0. 0 0 7 0 . 009 0. 01 1 0 . 1 7 0 . 2 2 0 . 2 7 f 0. 02 17 0 . 55 g 0. 0 3 7 0 . 039 0. 04 1 0 . 9 5 1 . 0 0 1 . 0 5 h 0 0 3 0 6 0 0 0 3 0 6 0 i 0. 0 2 0 0 . 022 0. 02 8 0 . 5 0 0 . 5 5 0 . 7 0 j 0. 0 0 4 0 . 0 0 8 0. 1 0 0. 21 no t e : le ad c o p l an a r i t y t o b e w i t h i n 0. 00 4 i n c h e s . i n c h e s mi l l i me t e r s p l a s t i c t h in s m a ll o u t lin e p a c k a g e ( t s o p ) t y p e 1 d i m e n s io n s 5 6 7 8 9 10 11 12 13 14 2 3 4 15 16 17 18 19 20 21 22 23 24 25 26 27 28 a b g f c d e h j i a b g c f e h j 4 8 10 1 2 3 5 6 7 9 11 12 13 14 18 20 24 17 16 15 19 21 22 23 25 26 27 28
ISD2532/40/48/64 12.4. d ie b onding p hysica l l ay o u t [1] isd 2 53 2 / 4 0 /4 8 / 6 4 a3 a2 a1 a0 v cc d p/ r xc lk eom p d ce ovf a4 a5 a6 an a o u t ana in agc m i c ref mic sp - sp+ v ss d au x i n a8 a7 nc v ssa v cca ISD2532/40/48/64 o die dimensions x: 1 4 9 . 6 + 1 mils y: 2 0 6 . 3 + 1 mils o die thickness [2] 1 1 . 8 + .4 mils o pad opening 111 microns (4.4 mils) n o t e s : [1 ] the backside of die is internally connected to v ss . it must not be connected to any other potential or damage may occur . [2 ] die thickness is subject to change, please contact winbond factor y for status and availability . - 38 -
ISD2532/40/48/64 ISD2532/40/48/64 product pad designations (with respect to die center) pad pad name x axis (m) y axis (m) ovf overflow output 1675.95 1779.38 ce chip enable input 1728.08 2114.25 pd power down input 1731.83 2383.88 eom end of message 1342.20 2411.63 xclk no connect (optional) 987.83 2450.63 p/ r p l a y b a c k / r e c o r d 8 0 8 . 5 8 2 4 5 3 . 2 5 v ccd v cc digital power supply 546.08 2449.13 a 0 a d d r e s s 0 - 8 9 6 . 5 5 2 4 2 5 . 1 3 a 1 a d d r e s s 1 - 1 1 1 4 . 0 5 2 4 2 5 . 1 3 a 2 a d d r e s s 2 - 1 3 2 9 . 6 8 2 4 2 5 . 1 3 a 3 a d d r e s s 3 - 1 5 4 2 . 6 8 2 4 2 5 . 1 3 a 4 a d d r e s s 4 - 1 6 3 9 . 0 5 2 1 7 8 . 7 5 a 5 a d d r e s s 5 - 1 6 9 6 . 8 0 1 9 6 0 . 8 8 a 6 a d d r e s s 6 - 1 6 9 6 . 8 0 1 7 3 1 . 3 8 n c n c - 1 7 2 9 . 8 0 - 1 8 7 5 . 7 5 a 7 a d d r e s s 7 - 1 7 2 9 . 8 0 - 2 0 6 1 . 0 0 a 8 a d d r e s s 8 - 1 7 2 9 . 8 0 - 2 3 4 3 . 3 8 aux in auxiliary input -1408.80 -2408.25 v ssd v ss digital power supply -1111.43 -2388.75 v ssa v ss analog power supply -406.43 -2431.13 sp+ speaker output + -46.05 -2360.25 sp- speaker output - 388.20 -2360.25 v v cc analog power supply 747.83 -2403.00 m i c m i c r o p h o n e i n p u t 1 1 0 2 . 5 8 - 2 4 3 8 . 6 3 mic ref microphone reference 1296.08 -2438.63 agc automatic gain control 1667.70 -2422.88 ana in analog input 1729.95 -1946.63 ana out analog output 1702.20 -1703.63 cca publ i c at i on rel e ase dat e : june 2003 - 39 - revi si on 1.0
ISD2532/40/48/64 13. ordering information product number descriptor key i s d 2 5 32 = 32 seconds 40 = 40 seconds 48 = 48 seconds 64 = 64 seconds dura tion: isd2500 series sp ecial t e mp eratu r e f i eld : blank = commercial packaged (0 ? c to +70 ? c) or commercial die (0 ? c to +50 ? c) packag e t y p e : p = 28-lead 600mil plastic dual inline package (pdip) s = 28-lead 300mil small outline integrated circuit (soic) e = 28-lead 8x13.4 mm t h in small outline package (t sop) t y pe 1 x = die when ordering ISD2532/40/48/64 products refer to t he following part numbers which are supported in volume for this product series. consult the loca l winbond sales representative or distributor for availability information. part number part number part number part number i s d 2 5 3 2 p i s d 2 5 4 0 p i s d 2 5 4 8 p i s d 2 5 6 4 p i s d 2 5 3 2 s i s d 2 5 4 0 s i s d 2 5 3 2 e i s d 2 5 4 0 e i s d 2 5 4 8 e i s d 2 5 3 2 x i s d 2 5 4 0 x i s d 2 5 4 8 x i s d 2 5 6 4 x for the latest product information, access winbond?s w o rldw ide w e bsite at h t t p : / / www. wi nbond-usa.com - 40 -
ISD2532/40/48/64 14. version history v e r s i o n d a t e d e s c r i p t i o n 0 apr. 1998 preliminary specifications. 1 . 0 j u n . 2 0 0 3 reformat the document. update tsop description in pi n configuration section. revise table 1: product summary. update tsop and soic package option. remove industrial temperature option. publ i c at i on rel e ase dat e : june 2003 - 41 - revi si on 1.0
ISD2532/40/48/64 - 42 - he a dqua r t e r s winbond ele c t r onic s cor por a t ion a m e r ic a winbond ele c t r onic s ( s ha ngha i) lt d. no. 4, creation rd. iii 2727 north first street, san jose, 27f, 299 y an an w . rd. shanghai, science-based industrial park, ca 95134, u.s.a. 200336 china hsinchu, t a iw an t e l: 1-408-9436666 t e l: 86-21-62365999 t e l: 886-3-5770066 fax: 1-408-5441797 fax: 86-21-62356998 fax: 886- 3- 5665577 http:// www.wi nbond- usa.com/ http:// www.wi nbond .com .tw/ t a ipe i of f i c e winbond ele c t r onic s cor por a t ion j a p a n winbond ele c t r onic s ( h .k.) lt d. 9f, no. 480, pueiguang rd. 7f daini-ueno bldg. 3-7-18 unit 9-15, 22f, m i llennium city , neihu district shiny o kohama kohokuku, no. 378 kw un t ong rd., t a ipei, 114 t a iw an y o kohama, 222-0033 kow l oon, hong kong t e l: 886-2-81777168 t e l: 81-45-4781881 t e l: 852-27513100 fax: 886-2-87153579 fax: 81-45-4781800 fax: 852-27552064 pl ease note that al l data and speci f i c ati ons ar e subj ect to chang e w i thout noti c e. al l the tr ademar ks of pr oducts and compani e s menti oned i n thi s datasheet bel ong to thei r r e specti v e ow ner s. t he contents of this docum ent are provided only as a guide for t he applications of w i nbond products. w i nbond makes no representation or w a rranties w i th respect to the accuracy or completene ss of the contents of this publication and reserves the right to discontinue or make changes to spec ifications and product descriptions at any time w i thout notice. no license, w hether express or implied, to any intellectual property or other right o f w i nbond or others is granted by this publication. except as set forth in w i nbond' s standard t e r m s a n d conditions of sale, w i nbond assumes no liability w hatsoev er and disclaims any express or implied w a rranty o f merchantability , fitness for a particular purpose or i n f r i n g e m e n t o f a n y intellectual property . w i nbond products are not designed, in tended, authorized or w a rranted for use as components in sy stems o r equipments intended for surgical implant ation, atomic energy control instruments, airplane or spaceship instruments, transportation in struments, traffic signal instruments, co mbustion control instru ments, or for othe r applications intended to support or su stain life. f u rther more, w i nbond pr oducts are not intended for applications w herein failure of w i nbond products could result or lead to a situation w herein personal injury , death or severe property or environmental injury could occur. a pplication examples and alter native uses of any integrat ed circuit contained in this publication are for illustration only and w i nbond makes no representation or w a rranty that such applicati ons shall be suitable for the use specified. isd ? and chipcorder ? are trademarks of w i nbond el ectronics corporation. t he 100-y ear retention and 100k record cy cle projec tions are based upon accelera ted reliability tests, as published in the w i nbond reliability report, and ar e neither w a rranted nor guaranteed by w i nbond. information contained in this isd ? chipcorder ? data sheet supersedes all data fo r the isd chipcorder products published by isd ? prior to august, 1998. t h is data sheet and any future addendum to this dat a sheet is(are) the complete and controlling isd ? chipcorder ? product specifications. in the event any inconsistencies exist betw een t he information in this and other product documentation, or in the ev ent that other product documentation contains informati on in addition to the information in this, the information contained herein supersedes and governs such other information in its entirety . copy right ? 2003, w i nbond electronics corporati on. all rights reserved. isd ? is a registered trademark o f w i nbond. chipcorder ? is a trademark of w i nbond. all other tr ademarks are properties of their respective ow ners.

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